Today's Hard|Forum Post
Today's Hard|Forum Post

Tuesday October 09, 2018

IBM Integrates Graphene Into Wafer Dies

Graphene transistors are nothing new, in fact IBM has been working on them for quite some time. However, actually using graphene in large scale integrated circuits is a challenge. In an article published in Nature, IBM researchers claim they've successfully used graphene as a base to hold other nanomaterials at a large scale. Instead of using traditional CVD methods, the researchers use electrodes that "drag nanomaterials to predefined locations where material deposition is desired."

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We note that large-scale integration of high-performance electronic circuits made from nanotube solutions, as recently demonstrated in ref. 21, is feasible based on the method reported here. While experiments in this work are performed at the scale of wafer dies, implementation at full wafer scale could soon be demonstrated, considering the feasibility of wafer-scale dielectrophoretic assembly with standard metal electrodes. In addition, our approach enables the design of integrated circuits such as integrated photodetector or light-emitting diodes circuit where certain device functionalities are carried out by different nanomaterials. In that regard, we note that successive deposition steps are feasible with the method discussed here, that is, once the materials are deposited, they remain adhered to the substrate surface and tolerate multiple subsequent deposition and rinsing steps. Another important direction of future research is the demonstration of the graphene-based placement method on a single particle level. Since dielectrophoresis with metal electrodes has already achieved individual nanotube and nanowire precision, an extension of our method could enable large-scale integration of exploratory quantum electronics and optoelectronics devices, as well as applications in biotechnology.

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