![[H]ardOCP](/images/blank.gif){kind=small}
- Date:
- Tuesday , February 22, 2005
- Author:
- Morry Teitelman
- Editor:
- Kyle Bennett
- Google +1
DFI nF4 SLI-DR
DFI's latest socket 939 offering pairs the power of the nForce4 chipset with PCI-Express based SLI. Read on to see how well this board does against the rest of the nForce4 SLI crowd.
BIOS (continued)
The DRAM Configuration submenu, which is accessible from the main Genie BIOS Setting menu, contains all memory bus speed and timing related configuration options.
The DRAM Frequency Set (MHz) option configures the memory bus speed through the uses of ratios, with the ratio listed as memory bus speed/CPU FSB. The settings themselves list both the memory bus speed based on a default CPU FSB of 200MHz, and the ratio associated to the setting. The ratios available for selection range from a 1:2 ratio to a synchronous 1:1 ratio, allowing for enormous latitude in setting the memory bus speed when using ultra high CPU FSB settings.
DFI chose to give the end user a myriad of choices for configuring the memory settings on the nF4 SLI-DR. Configurable memory timing options include the following: CAS latency; RAS to CAS delay; active to precharge delay (shown as Min RAS# active time(Tras); RAS precharge delay (shown as Row precharge Time); row cycle time; row refresh cycle time; row to row delay; write recovery time; write to read delay; read to write delay; refresh period; write CAS latency; DQS skew control; DQS skew value; drive strength; data drive strength; asynchronous latency; read preamble; idle cycle limit; read/write queue bypass; and maximum bypass count (shown as Bypass Max). Note that on most memory timings listed, the numerically lower setting forces more aggressive memory operation. For the drive strength and data drive strength options, the higher values are the more aggressive settings. Note that for command rate (shown as Command Per Clock (CPC)), idle cycle counter, and the 32 Byte Granularity settings, you have the option of enabled or disabled only.