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- Date:
- Wednesday, November 19, 2003
- Author:
- Morry Teitelman
- Editor:
- Kyle Bennett
- Google +1
ABIT AI7
Sporting the uGuru processor and its deep features, the AI7 builds on ABITs already critically acclaimed line of i865PE boards. Its performance promises to make it an enthusiast favorite.
BIOS
The AI7s BIOS is implemented around the Phoenix AwardBIOS. ABIT has heavily modified to the BIOS to make it more appealing to the growing enthusiast market.
The SoftMenu Setup page is ABITs world famous customized BIOS interface. ABIT gives you full access to all FSB and voltage related settings from a single centralized location.
With the CPU Operating Speed option set to User Defined, all FSB related settings become user configurable. The Ext. Clock (CPU/AGP/PCI) setting controls the base CPU FSB. Using this option, you can set the CPU FSB from 100 MHz to a maximum setting of 412 MHz. The Fixed AGP/PCI Frequency setting controls the speed for the AGP and PCI buses, asynchronously from the CPU FSB setting. This gives you greater latitude in configuring your system for maximum stability. Through this setting, you are able to set the AGP FSB from the stock 66 MHz to 96 MHz. Note that the PCI FSB is always ½ of the selected AGP FSB setting.
The N/B Strap CPU As and DRAM Ratio (CPU:DRAM) options are used in conjunction with one another to configure the DRAM FSB based on the user defined CPU FSB. The CPU FSB is defined through the Ext. Clock (CPU/AGP/PCI) option. In practice, it has been found that the N/B Strap CPU As option only takes affect when the setting selected is equal to or less than the currently defined CPU FSB. If the N/B Strap CPU As option is set to a higher setting than the current CPU FSB, the setting is ignored by the system, and the RAM will run as determined by the SPD settings. The following charts goes through the divider options available through the DRAM Ratio option with each of the various N/B Strap CPU As options selected.
N/B Strap CPU As | DRAM Ratio (CPU:DRAM) |
By CPU | 1:1 (533, 800 MHZ CPUs) |
3:2 (800 MHz CPU) | |
3:4 (400 MHz CPU) | |
4:5 (533 MHz CPU) | |
5:4 (800 MHz CPU) | |
By SPD (DDR speed determined by internal memory circuitry) | |
PSB400 | 3:4 |
By SPD (DDR speed determined by internal memory circuitry) | |
PSB533 | 1:1 |
4:5 | |
By SPD (DDR speed determined by internal memory circuitry) | |
PSB667 | 1:1 |
5:4 | |
By SPD (DDR speed determined by internal memory circuitry) | |
PSB800 | 1:1 |
3:2 | |
5:4 | |
By SPD (DDR speed determined by internal memory circuitry) |
With the CPU Power Supply option set to User Defined, the CPU Core Voltage option becomes user configurable. This option controls how much voltage the board provides to your power hungry CPU. ABIT chose to allow a maximum setting of 1.925v, which should be more than adequate to push your CPU over the magical 300 MHz FSB boundary. The DDR Voltage option controls the boards memory voltage, again with a health voltage ceiling. The maximum memory voltage definable is 3.2v, which in tandem with the excessive amount of CPU voltage allowed, should be adequate for any overclocking. Note that it is highly recommended to actively cool your system memory by way of a fan with the DDR Voltage option set to higher than 2.9v. The AGP VDDQ Voltage controls the boards AGP voltage, with a not so shabby maximum of 2.65v. While not as hefty as the CPU or DDR voltage, this voltage should be sufficient for most AGP related overclocking.
The Advanced Chipset Features menu contains various options for controlling how aggressively chipset related functions interact with the rest of the system. Changing system timing settings, including the memory timings, can lead to major system performance increases when compared with un-optimized settings.
With the DRAM Timing Selectable option set to manual, an assortment of memory timing options becomes user configurable. Memory timing options available include CAS latency, Active to Precharge delay, RAS to CAS delay, and RAS Precharge delay. On all memory timing settings, setting a lower number causes the system memory to function more aggressively.
The bottom of the Advanced Chipset Features menu is dedicated to ABITs own brand of chipset timing options, dubbed Game Accelerator. The Game Accelerator options allow for user configuration of memory and chipset timings through a variety of preset selections. These selections include F1, Street Racer, Turbo, and Auto, where F1 is the most aggressive setting available and Auto is the least aggressive. The Game Accelerator technology was first introduced by ABIT as a method of squeezing i875P-like performance out of an i865PE chipset board. Note that the Street Racer and F1 options cause the chipset and memory to run extremely aggressively, leading in turn to severe memory related stability issues. The Refresh Cycle Time option determines how often the data contained in the memory modules are refreshed by the system, the more aggressive the setting, the faster the refresh time becomes. The Read Delay(tRD) and Read Delay Adjust(tRDA) options control how aggressively the memory is accessed for Read operations by setting the wait state between successive memory Reads to the selected setting within the Read Delay(tRD) option. The Command Per Clock(CPC) option determines the delay time between address command based on the DRAM strobe clock. In testing with the various Game Accelerator related settings, it has been found that the best system performance/stability can be had when the memory timing parameters are configured manually by the user, using the options within the DRAM Timing Selectable section.
The Integrated Peripherals menu contains various submenus for controlling the boards integrated peripherals. The Intel ICH5R Southbridge based RAID controller is configured through the OnChip Serial ATA Mode option within the OnChip IDE Devices submenu. With the option set to RAID, the SATA RAID ROM option becomes available. In RAID mode, you have the option of using your SATA drives independently, or configured in a RAID 0 or RAID 1 array. With the OnChip Serial ATA Mode option set to IDE mode, the SATA ports act independently. Further, the behavior of both the IDE and SATA ports are configurable using the OnChip Serial ATA option.
The OnChip PCI Device submenu, accessible from within the Integrated Peripheral menu, contains options for configuring onboard PCI based devices. The state of the integrated Realtek 10/100 Ethernet controller is determined via the Onboard LAN Controller option. Furthermore, enabling the Enhance Performance option can lead to increased network performance. This option forces the LAN controller to be set as the highest priority PCI component.